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Google TPU 8t + 8i: The First TPU Generation to Split Training and Inference

· 5 min read
Industry Research Team

On April 22, 2026, at the Cloud Next conference, Google unveiled TPU 8t + TPU 8isplitting TPU into two independent product lines for the first time. TPU 8t focuses on training, TPU 8i on inference. This is a key product adjustment as Google responds to the AI inference era.

Why Split TPU?

The previous 7 generations of TPU (v1 → v7 Ironwood) were all general-purpose for both training and inference:

  • v4–v6e: training-first, inference auxiliary
  • v7 Ironwood: began favoring inference, but still general-purpose

But the AI industry in 2025–2026 has undergone fundamental changes:

  1. Training demand: only a few top-tier companies (OpenAI, Anthropic, Google DeepMind, Meta, xAI) need it
  2. Inference demand: every AI application needs it — a 100× larger market
  3. Inference optimization direction: fundamentally different from training
    • Training: compute + interconnect first (compute-bound)
    • Inference: memory + bandwidth + cooling flexibility first (memory-bound + TCO sensitive)

Google therefore decided to split TPU into two product lines:

ProductPositioningCore Optimization
TPU 8tTraining dedicatedCompute + Interconnect + integrated Axion CPU
TPU 8iInference dedicatedMemory + Bandwidth + cooling flexibility

TPU 8t: Training Dedicated

ItemSpecification
ArchitectureTPU 8t (Trillium 2)
Form factorTraining dedicated
BF16 compute (dense)~3,500 TFLOPS
FP8 compute (dense)~7,000 TFLOPS
HBM capacity216 GB
HBM bandwidth6,528 GB/s
ICI interconnect1,400 GB/s (bidirectional)
Integrated CPUArm Axion (Google custom, 64-core)
Pod scale9,216 chips
Topology3D Torus
CoolingLiquid cooling

Arm Axion is Google's custom 64-core ARM CPU, entering the TPU node for the first time. This makes the TPU 8t node a TPU + Axion CPU co-system, targeting NVIDIA Vera CPU.

TPU 8i: Inference Dedicated

ItemSpecification
ArchitectureTPU 8i (Trillium 2)
Form factorInference dedicated
BF16 compute (dense)~5,500 TFLOPS
FP8 compute (dense)~11,000 TFLOPS
INT8 compute~22,000 TOPS
HBM capacity288 GB
HBM bandwidth8,601 GB/s
CoolingAir / Liquid cooling
Pod scale256 chips

TPU 8i single-card 288GB HBM = the largest memory inference ASIC currently. A single card can hold FP16 70B models (no tensor parallelism needed), ideal for long-context RAG, Agentic AI.

TPU 8t vs 8i Key Differences

MetricTPU 8t (Training)TPU 8i (Inference)
PositioningTrainingInference
BF16 compute~3,500 TFLOPS~5,500 TFLOPS (stronger)
HBM capacity216 GB288 GB (larger)
HBM bandwidth6,528 GB/s8,601 GB/s (higher)
CoolingLiquidAir/Liquid
Pod scale9,216 chips256 chips
Integrated CPUArm AxionNone (standalone)
PriceHighMedium

Purpose of split: training emphasizes compute + interconnect; inference emphasizes memory + bandwidth + cooling flexibility.

TPU 8i Inference Paradigm Optimizations

TPU 8i is specifically optimized for inference scenarios:

Optimization DirectionContent
Ultra-low latencyTTFT <100ms (Time to First Token)
High throughput10,000+ tok/s (70B model FP8)
Long-context KV288GB retains 1M+ token context fully
MoE InferenceExpert Parallel native support
Speculative DecodingInternal speculative acceleration
BatchingContinuous batching + PagedAttention
Continuous KV CacheKV Cache cross-request sharing (same prefix optimization)

TPU 8t Training Paradigm Optimizations

TPU 8t is specifically optimized for training scenarios:

Optimization DirectionContent
MoE TrainingExpert Parallel native support (DeepSeek / Mixtral style)
Long-context Training1M+ token context training optimization
RLHF / Post-trainingOnline RL (DPO / PPO / GRPO) native optimization
Multimodal TrainingVision-Language joint training (ViT + LLM synchronous)
AXIOMArm Axion CPU co-processing (data preprocessing / weight initialization)

TPU 8i Inference Service Pricing

InstanceEstimated Hourly Price
TPU 8i v6e-equivalent~$3-5 / chip
TPU v7 Ironwood~$6-8 / chip
TPU 8i vs TPU v7+50% price / +150% compute

TPU 8i per-dollar BF16 compute is 70% higher than TPU v7 Ironwood (based on 2.4× compute / 1.5× price).

Software Ecosystem

TPU 8t

  • JAX 0.5+: Google's primary training framework
  • PyTorch/XLA 2.5+: PyTorch compatibility
  • TensorFlow 2.17+: legacy framework
  • Paxml / Orbax: Google internal LLM training stack
  • MaxText: Google reference implementation

TPU 8i

  • JAX 0.5+: inference
  • PyTorch/XLA 2.5+: inference
  • vLLM 0.8+ (TPU backend): low-latency inference
  • Vertex AI Inference: Google managed inference service
  • Gemini API: largest internal user

Comparison with Contemporaries

MetricTPU 8tTPU 8iNVIDIA B300 UltraGroq 3 LPX
PositioningTrainingInferenceTraining + InferenceUltra-low-latency inference
HBM/SRAM216 GB HBM288 GB HBM288 GB HBM3e128 GB SRAM
Bandwidth6.5 TB/s8.6 TB/s8 TB/s40 PB/s
BF16 compute3.5 PF5.5 PF3.5 PF (FP8 dense)320 PF (rack)
Interconnect3D Torus3D TorusNVLink 5GroqSync
CoolingLiquidAirLiquidLiquid
CustomerGoogle DeepMindGemini / Vertex AIAWS / AzureNVIDIA customers

Detailed Product Pages

Summary

The Google TPU 8t + 8i split is a landmark event in the AI inference era:

  1. First-ever training/inference TPU split — TPU enters the "specialization" era
  2. TPU 8i 288GB HBM — a single card can hold a 70B model
  3. TPU 8i air cooling — lowers datacenter deployment barrier
  4. Arm Axion integration — Google's custom CPU enters TPU
  5. JAX training paradigm — Google bets on JAX as the next-gen training standard

Google now has "full-scenario AI compute coverage":

  • Training: TPU 8t pod
  • General inference: TPU 8i
  • Gemini API: TPU 8i cluster
  • Vertex AI: TPU 8i commercial