29 posts tagged with "GPU"

按照IT行业的老经验，服务器硬件三年折旧归零。但H100正在改写这条铁律：机龄一年半到两年半的二手卡仍能保住原价的四分之三以上，2026年甚至出现了挂牌交易的机构化二手市场。AI芯片为何成了科技史上罕见的"硬通货"？

一条反常的价格曲线​

先看数据。多家渠道2026年的报价显示：二手H100 80GB单卡价格大致稳定在1.2万至2.2万美元区间，视成色与渠道而异；英国经销商Servnet报告称，2023年底卖约4万美元的H100如今二手市场成交在1.2万至2.2万美元。硬件金融公司Mercatus追踪的残值曲线显示，机龄18至30个月的H100仍保留75%至85%的价值，60个月后才降至25%至35%的底部区间。

对比之下，消费级显卡在下一代发布后12个月内通常贬值40%到50%。更反常的是租金与售价的背离：据Silicon Data等机构研究，H100按小时计的市场租赁价已从2023年峰值的7至10美元跌至2至4美元，但一年期合约租金却从2025年10月的1.70美元/小时涨到2026年3月的2.35美元/小时——零散供给在跌价，锁定型需求在涨价。

指标	2023至2024年峰值	2026年现状
H100单卡全新价格	炒至最高约5万美元	约2.5万至4万美元
H100单卡二手价格	尚无活跃市场	约1.2万至2.2万美元
小时租金（现货）	7至10美元	2至4美元
一年期合约租金	约1.7美元/小时	约2.35美元/小时
18至30个月残值率	无数据	75%至85%

硬通货的三重支撑​

H100保值的第一重支撑是推理经济学。大模型推理对算力的要求低于训练，H100跑推理的单位token成本依然划算，二手买家买的是"每token成本"而非"峰值性能"，这为旧卡创造了长尾需求。第二重是供给端：Blackwell虽在放量，但HBM与先进封装持续受限，新旧交替被拉长，H100大规模退役的时点不断后移。第三重是稀缺的合规供给——据英国《金融时报》援引中国芯片贸易商的报道，一台美国零售约40万美元的DGX B300服务器在中国市场成交价一度超过800万元人民币，同款硬件因法律可及性不同而出现数倍价差，套利需求外溢抬高了全球二手价格。

从灰色交易到机构化市场​

2026年7月，一个面向企业级客户的二手、翻新与富余算力交易平台正式开放，挂牌覆盖H100、H200、B200、A100、L40S等多代产品，询价量从数百台到数万台不等。这标志着二手GPU从零散的电商与拍卖，走向有报价、有质保分层（翻新机较未测试机溢价15%到25%）的机构化市场。与此同时，超过200亿美元的算力抵押贷款依赖残值假设——二级市场给出的可观测价格，让贷款方第一次能用真实数据校准折旧模型。

研判：保值是周期现象，不是永恒规律​

必须清醒地看到，H100的保值建立在"下一代产能受限、推理需求爆发"两个暂时条件上。行业共识是：一旦Rubin世代在2026年底至2027年大规模铺开，H100二手价将再承压10%到20%，残值曲线终会走向传统IT设备的归宿。但这段插曲的产业意义深远：它证明了当算力成为生产资料，GPU就从"设备"变成了"资产类目"，拥有租金、残值、证券化与抵押融资的完整金融属性。对采购方而言，现在的关键是时机——在下一代广泛可用前，H100仍是最抗跌的算力资产。

vLLM 早已不只是"NVIDIA 专属"的推理引擎。随着硬件插件化 RFC 落地，AMD、昇腾、TPU 都有了官方或社区维护的后端，但各家成熟度差异悬殊。本文按硬件路线梳理适配矩阵与部署要点。

主流硬件后端适配矩阵​

硬件路线	接入方式	关键依赖	成熟度评估
NVIDIA CUDA	内置后端，开箱即用	CUDA 12.x + 主线 PyTorch	最高，特性首发地
AMD ROCm	内置支持（Docker 镜像分发）	ROCm 6.x + PyTorch ROCm 版	较高，主流模型覆盖
华为昇腾	vllm-ascend 硬件插件	CANN 8.0 以上 + torch-npu	快速追赶，2025 年完成 V1 引擎适配
Intel Xeon CPU	内置 CPU 后端	AVX-512 / AMX	稳定，适合中小模型与降本场景

需要提醒的是，vllm-ascend 从 2025 年 2 月立项后保持了约两周一个版本的节奏，v0.7.3 实现核心加速特性支持，v0.9.1 引入大规模专家并行（EP），v0.11.0 显著提升稳定性，社区反馈显示互联网、银行、运营商场景已有规模化生产落地。版本号与 vLLM 本体严格对齐，升级时必须成对更新。

NVIDIA 路线的调参要点​

在 H100/A100 上，vLLM 默认配置已经不错，但仍有几个高频调整项：

1. gpu-memory-utilization：默认 0.9，多进程共享一张卡或多卡跑多模型时建议压到 0.8 左右，避免 OOM 后进程被杀。
2. max-model-len 与 max-num-seqs：上下文长度直接决定 KV Cache 预留显存，生产环境不要盲目拉到模型上限，按业务 P99 输入长度加余量设置。
3. chunked prefill 与 prefix caching：新版默认开启，长输入场景收益明显；RAG 类应用务必确认前缀缓存生效。
4. 量化方案：FP8 适合 Hopper 及以上，AWQ/GPTQ 适合消费级卡与老卡，选型前先跑精度评测再上量。

昇腾与 AMD 路线的现实​

昇腾路线要求 CANN 8.0 以上、torch-npu 与 vLLM 版本严格匹配，官方推荐通过容器镜像部署以规避环境漂移。Atlas 800I A2 系列是当前插件的主战场，DeepSeek、Qwen、GLM 等主流开源模型均已覆盖，PD 分离（Prefill/Decode 分离）与专家并行也在持续增强。

AMD 路线则相对简单，官方 Docker 镜像内置 ROCm 支持，MI300X 凭借 192GB 显存在 70B 级稠密模型上可以单卡部署，省去张量并行带来的通信开销。但部分自定义算子和投机解码特性更新会比 CUDA 路线滞后一至两个版本，上线前要针对目标模型跑完整回归测试。

实操建议​

1. 用容器镜像锁定版本组合，不要在生产机器上直接 pip 安装三件套（vLLM、torch、底层驱动栈）。
2. 换硬件或升级版本时，先在预发环境跑官方精度评测脚本，再压测吞吐与时延曲线。
3. 关注 vllm-ascend 与 ROCm 后端的 Release Note，特性差距在缩小，但"最新特性"往往只在 CUDA 路线可用。
4. 混合集群建议统一 OpenAI 兼容 API 层，让业务侧对硬件无感，方便后续按成本迁移。

语音是所有 AI 推理场景里"单路最便宜、体验最挑剔"的一类：模型小到一张入门卡就能跑，但用户对延迟的容忍度以百毫秒计。选型的核心不是买多大的卡，而是把延迟预算分配对。

一、ASR 侧：Whisper 家族的显存与速度账​

Whisper 各型号的显存需求很友好：large-v3（1.55B 参数）FP16 约 3GB、INT8 约 1.5GB；large-v3-turbo（809M）FP16 约 2GB；蒸馏版 distil-large-v3 约 1.5GB，速度约为原版 6 倍。实测数据（faster-whisper 加 CTranslate2、INT8、单流）显示：RTX 3060 12GB 跑 large-v3 实时率约 10 至 12 倍，4090 达 40 至 50 倍，5090 达 55 至 65 倍。实时率（RTF）越高，单卡能承载的并发转写路数越多。

选型要点：中文与多语种业务建议 large-v3 或 turbo（蒸馏版在小语种和噪音场景的错误率上升明显）；电话客服场景 16kHz 采样即可，音频前处理加 VAD 静音裁剪能减少约一半的计算量。

二、TTS 侧：从"能听"到"克隆"的显存阶梯​

TTS 的显存跨度比 ASR 大得多：轻量方案（Kokoro 82M、Piper 类）不足 1GB，甚至可以纯 CPU 运行；中量级（Qwen3-TTS 1.7B 类）约 4GB；高表达力与音色克隆方案（Step-Audio 7B 级、Chatterbox、XTTS v2）约 3 至 8GB；旗舰级方案则要 12 至 17GB。完整语音对话管线（STT 加 LLM 加 TTS 三模型常驻）的典型显存账是 10 至 16GB——这意味着一张 16 至 24GB 的卡就能承载单机完整语音助手。

并发规模	业务形态	推荐配置	预算区间	关键指标
10 路以内	门店助手、智能音箱 demo	RTX 5060 Ti 16GB 或 4090 单卡	0.6 万至 2 万元	端到端低于 500 毫秒
30 至 100 路	中小客服中心、会议转写 SaaS	双卡 4090 或单卡 A100 40GB 服务器	5 万至 20 万元	转写排队低于 200 毫秒
300 至 1000 路	大型外呼平台、实时字幕服务	8 卡 A800 或 H100 集群加流式调度	60 万至 240 万元	按路数横向扩容，P95 延迟稳定
信创合规场景	政企呼叫中心	Atlas 300I Duo 推理卡集群	单卡约 2 万至 4 万元	满足国产化验收，低功耗高密度

三、延迟预算怎么分配​

实时语音对话的端到端目标通常是低于 500 至 800 毫秒，一个可参考的分配：VAD 判停约 200 毫秒、ASR 增量转写约 100 毫秒、LLM 首 token 约 150 毫秒、TTS 首音频约 100 毫秒。优化优先级最高的三件事：用 turbo 或蒸馏版 Whisper 替代 large-v3（速度差 6 倍，精度损失可控）、ASR 与 TTS 用 INT8 量化、LLM 输出流式喂给 TTS 而非等全句。这三条做完，多数管线能在消费级硬件上摸到实时门槛，不必上高端卡。

另一个常被忽略的点是语音流的话音活动率：典型对话中每人只占 40% 至 50% 的时间，100 路并发通话在任一瞬间活跃的转写任务只有四五十路。按"名义并发乘 0.45"估算算力，能省下接近一半的采购量——但外呼机器人是例外，它的静音模式更规律，活动率要单独实测。

四、结尾建议​

语音 AI 服务的硬件决策顺序：先定延迟指标（决定单卡承载路数），再按并发规模定卡的数量，最后才看要不要更好的单卡。中小规模场景的默认答案是单张 16 至 24GB 消费卡承载 10 路完整语音管线，随业务增长横向加卡，比一开始买大机灵活得多。两点最后提醒：一是 ASR 加 TTS 加 LLM 同卡混布时，务必给各模型设显存预留与常驻策略，避免运行中被逐出显存造成数秒级卡顿；二是语音业务对成本极其敏感，月利用率长期低于三成时，2 至 4 元/小时的消费卡租赁比自建更划算。

从"国产兼容显卡"到"硬件光追+AI生成式渲染"，摩尔线程正在完成一次技术范式层面的跃迁——而AI算力与游戏GPU的双线并进，让这次跃迁有了更厚实的商业底座。

"庐山"来了：15倍渲染、50倍光追、64倍AI​

2026年9月3日，摩尔线程在半年度业绩说明会上介绍了下一代高性能图形渲染芯片规划：基于**"花港"架构的新一代GPU——"庐山"**，预计实现三大性能跃升：

• 3A游戏渲染性能提升15倍
• 光线追踪性能提升50倍
• AI性能提升64倍

官方计划于2026年底推出"庐山"芯片（上市时间以官方发布为准）。这三个数字放在一起，勾勒出的不是一次常规的代际迭代，而是一次"重写底座"式的升级：光追50倍意味着硬件光追从"支持"走向"实用"，AI性能64倍则预示着AI能力将从图形附庸升级为核心卖点。

两大核心渲染技术​

"庐山"的性能跃升背后，是两项核心渲染技术支撑：

其一是实时光线追踪。"庐山"基于花港架构设计了硬件光线追踪加速引擎，并支持DirectX Raytracing（DXR）。此前国产GPU普遍通过软件手段或有限硬件支持来兼容光追，而专用加速引擎+DXR支持的组合，意味着"庐山"将具备与主流游戏引擎光追管线对接的能力——这是3A游戏生态的门票。

其二是AI生成式渲染AGR。摩尔线程推出全自研的MTAGR 1.0技术，推动渲染范式"从计算走向生成"。传统光栅化渲染是逐像素计算的暴力美学，而生成式渲染借助AI模型直接生成画面细节，用更少的算力换更高的画质与帧率。NVIDIA的DLSS、AMD的FSR已验证了AI超分路径的价值，MTAGR 1.0则是国产GPU在渲染范式变革上的主动跟进——且选择直接押注"生成"而非仅仅"超分"。

双线并进：游戏GPU与AI算力​

"庐山"的故事不止于游戏。摩尔线程2026年的商业化进展呈现出游戏与AI算力两条腿走路的格局：

时间	事件	意义
此前	登陆科创板上市	打开资本通道，支撑高研发投入
9月3日	半年度业绩说明会公布"庐山"规划	图形GPU技术路线图明确
9月19日（报道）	京东云与摩尔线程合作万卡级集群部署上线	国产GPU万卡集群规模化落地
9月23-27日	数贸会（杭州）展示AI智算卡、万卡级集群	展示"模型训练工厂/词元生产工厂/智能体生产工厂"

在杭州数贸会上，摩尔线程展示的产品覆盖云-边-端全场景：AI智算卡、万卡级集群，以及面向大模型生命周期的"模型训练工厂""词元生产工厂""智能体生产工厂"。这套叙事与京东云万卡集群的落地相互印证——摩尔线程的AI算力业务已经从"卖卡"进入"卖集群、卖工厂"的深水区。

技术跃迁的深层逻辑​

回顾国产GPU的发展路径，第一代产品的核心命题是"兼容"——让Linux桌面、办公软件、视频播放跑起来；而"庐山"的命题变成了"范式"——硬件光追对接主流3A管线、AGR参与全球渲染范式变革、AI性能面向大模型时代。从跟随式兼容到范式级参与，这是国产GPU厂商第一次在图形技术方向上与国际一线站在同一条起跑线附近。

AI性能提升64倍的目标也值得放在行业背景下解读：图形与AI本就同源，硬件光追引擎与AI算力单元共享大量基础能力。"庐山"把AI性能提升作为核心指标，说明花港架构在设计之初就为图形+AI双重负载做了统一规划。

小结​

"庐山"GPU承载着摩尔线程的三重跨越：技术上，从软件兼容走向硬件光追与MTAGR 1.0生成式渲染的范式创新；产品上，从单一显卡走向云-边-端全栈布局；商业上，从科创板上市到京东云万卡集群落地，AI算力与游戏GPU双线并进。3A渲染15倍、光追50倍、AI性能64倍的目标能否兑现，要等2026年底产品揭晓（以官方发布为准），但方向已经清晰：国产GPU不再满足于"能用"，而是开始追求"领先"。

For the past three years, the entire AI hardware story was "training": who had the most H100s, who could connect a hundred thousand GPUs into a cluster. That race is essentially settled — NVIDIA won. But the next battlefield, "inference," is being fought under completely different rules: the measure is no longer peak FLOPS, but cost-per-token, latency, and power. In 2026, inference chips overtake training in scale for the first time, becoming the main battlefield of AI accelerators.

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1. Inference Becomes the Main Battlefield: 80%–90% of Compute Spent on Inference​

Training a large model costs hundreds of millions of dollars — once. But once the model goes live, it must answer billions of queries day after day. A popular consumer model may need tens of thousands of accelerators running 7×24 to keep up with demand. Therefore:

• Inference accounts for roughly 80%–90% of a model's lifecycle compute;
• Inference chips will make up about 60%–70% of the ~$400B AI accelerator market in 2026, up from only ~40% in 2023;
• Inference chip growth (estimated +52.7% YoY) significantly outpaces training chips (+28.4%); the share of inference-side compute demand exceeded training-side for the first time in 2026, reaching 54% (~$1010B).

The economics of inference are straightforward: training cost is amortized to near-zero, while inference cost becomes the entire bill. Every 1% cut in inference cost flows directly to profit — for a company whose inference traffic reaches hyperscale like OpenAI, the half of the bill is a number followed by a string of zeros.

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2. Market Size: Structural Growth Inflection Point Has Arrived​

Market	2026 Size	Growth	Notes
Global dedicated inference chips	$412.7B	+38.4%	14.2 pct higher growth than training chips
China dedicated inference chips	$118.6B (28.7% of global)	+44.1%	Strongest single market in APAC by growth
Global AI training/inference chips (incl. GPU/NPU)	exceeds $1850B	+40.2%	GPU ~62%

China's domestic substitution is accelerating, with domestic inference chips reaching 34.6% of shipments, up 9.8 pct from 2025.

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3. Technology-Axis Share Inverts: GPU Slows, ASIC Soars​

Axis	2026 Shipment Share	Trend
GPU	52.6%	Still leads, but growth slows to 22.7%
ASIC custom chips	41.3%	Up sharply from 17.8% in 2022
FPGA	Stable	Specific low-latency scenarios

Thanks to ecosystem maturity, GPU remains the mainstay, but NPU/ASIC already holds a 1.8× advantage over same-generation GPUs in energy efficiency, driving rapid adoption at the edge and on-device. Shipments of inference-optimized ASICs are expected to reach 11.5 million units, with unit cost about 35% lower than GPUs.

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4. Five Schools Clash​

School	Representative Products	Core Strength	Use Cases
General-purpose GPU	NVIDIA Rubin / B200 / H200	Mature ecosystem, train+infer unified	Frontier training + highly interactive inference
LPU (Language Processing Unit)	Groq LPU	Ultra-low latency, deterministic throughput	Real-time dialogue, high-concurrency inference
TPU (inference-specific)	Google TPU 8i (Zebrafish)	288GB HBM, 384MB on-chip SRAM, 19.2 Tb/s ICI	Google's scaled inference
Custom ASIC	OpenAI Jalapeno, Microsoft Maia 200, Meta MTIA	Strip generality tax for own models, ~50% lower cost/token	Hyperscaler's own workloads
Air-cooled inference card	Intel Crescent Island	350W air-cooled, 480GB LPDDR5X, tokens/watt	Cost-sensitive mid/long-tail inference

OpenAI's Jalapeno, co-developed with Broadcom, aims to cut inference token cost by roughly 50% versus a general-purpose GPU stack — the fifth member to join the "custom inference chip club" (after Google TPU, Amazon Inferentia/Trainium, Microsoft Maia, and Meta MTIA).

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5. Core Metric Shifts: cost-per-token and tokens/watt​

The fundamental difference between the inference race and the training race is the low switching cost:

• Training requires a 100k-GPU cluster + NVLink + CUDA, with extremely high migration cost;
• Inference is "embarrassingly parallel" at the endpoint level — no million-GPU cluster needed; a node that produces tokens fast and cheaply suffices, and is replaceable per endpoint.

This means NVIDIA's three moats (fastest silicon, NVLink scale-out, CUDA) are no longer absolute on the inference side. When the largest AI buyer (OpenAI) starts treating GPUs as "one of the options," the GPU premium begins to erode — pricing power relies on scarcity, and custom chips attack that scarcity from two directions at once: both reducing merchant-chip demand and giving buyers a credible external negotiation option.

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6. Edge and On-Device Explosion: Long-Tail Signal​

Demand shows significant long-tail and fragmentation:

Scenario	2026 Demand Size	Growth
Cloud inference	$198.2B (48%)	+24.5% (slowing)
Edge inference	$126.5B (30.7%)	+52.3%
On-device inference	$88.0B (21.3%)	+68.9%
Autonomous-driving inference	$67.3B	+58.2%
Industrial QA / robotics inference	$42.1B	+63.7%

The latency sensitivity and power constraints of inference workloads are reshaping chip architecture design priorities — which also explains why "air-cooled, large-memory" solutions like Crescent Island can find a niche.

Related Links​

• Hot Chips 2026 Full Recap
• Hyperscaler Custom Silicon Wave 2026
• NVIDIA Rubin Spec Page
• Intel Crescent Island Spec Page

References​

• Inference Chips vs Training Chips - ValueAdd VC
• Global and China Dedicated Inference Chip Industry In-Depth Research Report (2026) - IIM
• 2026 Global AI Training/Inference Chip Market and Trend Report - IIM
• Custom AI inference silicon: why OpenAI built Jalapeno - nexi.fund

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This article is compiled from publicly available 2026 market research, brokerage reports, and industry analysis. Market sizes and shares are third-party estimates with inconsistent methodologies and are for reference only.

June 6, 2026 — COMPUTEX 2026 concluded yesterday in Taipei. Under the theme "AI Together," this year's event set records with 1,500+ exhibitors and 6,000 booths. The head-to-head battle between NVIDIA, Intel, and AMD in the AI PC space was the defining story of the show.

1. NVIDIA RTX Spark: June Launch at $1,399​

Less than a week after its COMPUTEX debut, the NVIDIA-MediaTek RTX Spark Superchip confirmed its commercial timeline:

Detail	Info
Launch OEMs	ASUS, Dell, HP, Lenovo, Microsoft Surface, MSI
Availability	Fall 2026
Starting Price	Not yet announced (analysts estimate $3,000-4,000)
Core Specs	Arm CPU (up to 20 cores) + Blackwell GPU (6,144 CUDA cores)
Unified Memory	128 GB LPDDR5X (300 GB/s)
Model Capacity	Runs 120B parameter models, up to 1M token context

Market Reaction: AMD, Intel, and Qualcomm shares fell following the announcement. Analysts believe RTX Spark will reshape the market across three fronts — Windows AI PCs, creator workstations, and edge inference nodes.

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2. Intel 18A in Full Production: Clearwater Forest + Crescent Island​

Intel CEO Lip-Bu Tan delivered his first COMPUTEX keynote with two key updates:

Clearwater Forest (Xeon 6+)​

• 288 cores, Darkmont architecture
• First Intel 18A process node data center CPU
• Foveros Direct 3D packaging
• Now in full production

Crescent Island AI GPU​

• 480 GB LPDDR5x memory
• 350 W air-cooled PCIe form factor
• Native FP4 support, targeting agentic inference
• Shipping H2 2026

"As AI moves into the agentic era, the CPU returns to the center of modern AI infrastructure." — Lip-Bu Tan

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3. AMD Ryzen AI 400 Series Now Shipping​

AMD showcased the Ryzen AI 400 series (Zen 5 + Zen 5C hybrid + XDNA2 NPU) at COMPUTEX:

• NPU performance: 60 TOPS, the highest in x86
• 7 consumer SKUs + commercial PRO series
• Multiple OEM models already available or launching soon
• Advancing AI 2026 summit set for July in San Francisco

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4. Chinese Domestic Chips Gaining Momentum​

Vendor	Product	Status
Huawei	Ascend 950PR/950DT	In production, self-developed HBM
Cambricon	MLU690	2 PFLOPS FP8, shipping
Moore Threads	MTT S5000	1,000 TFLOPS, specs public

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5. The AI PC Era: Three-Way Roadmap Comparison​

Dimension	NVIDIA RTX Spark	Intel Clearwater Forest + Crescent Island	AMD Ryzen AI 400
CPU Cores	20-core Grace (Arm)	288-core Darkmont (x86)	Up to 12-core Zen5+5C
GPU/NPU	Blackwell GPU	Crescent Island (discrete GPU)	XDNA2 NPU (60 TOPS)
AI Compute	1 PFLOPS	TBD	60 TOPS NPU
Target	Personal AI agents	Dual-track: DC + AI PC	Copilot+ PC
Process	TSMC 4NP	Intel 18A	TSMC 4nm
Availability	June 2026	H2 2026	Shipping now

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This Week in AI Compute (6/1 – 6/6)​

Date	Event
Jun 1	NVIDIA GTC Taipei: RTX Spark, Vera Rubin production, DGX Station for Windows
Jun 1	Intel unveils Crescent Island, Clearwater Forest
Jun 2	COMPUTEX 2026 opens: "AI Together"
Jun 5	COMPUTEX closes: 1,500+ exhibitors, record scale
Jun 6	RTX Spark confirmed June launch at $1,399

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Sources: COMPUTEX Daily, Tencent News, Phoenix Technology, Xueqiu, The Silicon Review.

June 1, 2026, Taipei — During the Computex 2026 opening keynote, NVIDIA CEO Jensen Huang officially unveiled the RTX Spark super chip, marking NVIDIA's formal entry into the personal computer processor market dominated by Intel, AMD, Qualcomm, and Apple.

RTX Spark: The "Heart" of the Personal AI Computer​

RTX Spark was developed in collaboration between NVIDIA and MediaTek, featuring a heterogeneous package with a 20-core Grace CPU + Blackwell RTX GPU, equipped with 6144 CUDA cores. AI compute reaches 1 PFLOPS (one quadrillion floating-point operations per second), meaning personal computers now possess computing power comparable to a datacenter-class H100 GPU for the first time.

Specification	RTX Spark
CPU	20-core Grace (MediaTek collaboration, Arm architecture)
GPU	Blackwell RTX (6144 CUDA cores)
AI Compute	1 PFLOPS
Target	Personal AI Agent, local LLM inference
Launch OEMs	ASUS, Dell, HP, Lenovo, Microsoft Surface, MSI
Availability	Fall 2026
Form Factor	Laptop SoC + compact desktop workstation

Jensen Huang's "Full-Stack AI" Strategy​

The launch of RTX Spark is a key step in NVIDIA's "full-stack AI" strategy. Jensen Huang stated during the keynote: "AI should not only run in the cloud. Everyone's computer should have the ability to run AI agents."

RTX Spark transforms NVIDIA from a datacenter GPU monopolist into a full competitor in the personal computing market. Following the announcement, shares of AMD, Intel, and Qualcomm fell accordingly.

Market Impact​

• Intel: Personal computer AI processor business faces direct threat
• AMD: Ryzen AI series must compete at the same level
• Qualcomm: Snapdragon X Elite's Copilot+ PC positioning challenged
• Apple: M-series chips are no longer the only high-performance AI PC option

Vera Rubin Platform Enters Full Mass Production​

During the same keynote, Jensen Huang also announced that the NVIDIA Vera Rubin platform has entered full mass production. Rubin R200 features a 6-chip CoWoS-L package (1× Vera CPU + 2× Rubin GPU die + I/O/HBM die), equipped with 288GB HBM4, 22 TB/s bandwidth, and 50 PFLOPS FP4 compute (sparse).

The Rubin NVL72 rack (72 Rubin GPUs + 36 Vera CPUs) will begin shipping in H2 2026.

Other Highlights from Computex 2026​

• AMD: Showcased the MI350 series (192GB HBM3e, 5 PFLOPS FP8 dense), officially launching in June
• Intel: Jaguar Shores publicly unveiled for the first time
• Qualcomm: AI 200 / 300 series inference card roadmap updated
• Domestic AI Chip Zone: Huawei, Cambricon, Moore Threads, and others showcased their latest products

Industry Significance​

The launch of RTX Spark means AI compute is no longer confined to datacenters. Individual developers, designers, and researchers will be able to run large model tasks locally that previously required cloud GPUs, potentially redefining the market landscape for personal AI computing.

The mass production of Vera Rubin further consolidates NVIDIA's absolute leadership in datacenter AI training. Together, both product lines form NVIDIA's full-stack AI computing landscape of "cloud training + personal inference."

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This report is based on official NVIDIA announcements from Computex 2026 / GTC Taipei on June 1, 2026.

The AI accelerator chip space has three major mainstream architectures: GPU, NPU, and TPU. Add the recently emerging LPU (Language Processing Unit), and many developers find it hard to tell them apart.

This article compares them across four dimensions: architectural design philosophy, ecosystem maturity, real-world performance, and deployment cost.

In 2025, the AI accelerator market has become unprecedentedly rich. From NVIDIA's Blackwell to Huawei Ascend 910B, from Google TPU v6 to Groq LPU, developers face more choices than ever before.

But this is both a blessing and a challenge — picking the wrong card means either wasting money or falling short on performance.

This article helps you sort out the selection logic starting from actual workloads.