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Google TPU v6p (Pathway, 2024-12)

Overview​

Google TPU v6p (codename Pathway, unofficially known as Trillium Training Edition) is the training-specific variant of Google's 6th generation TPU, released 2024-12. Compared to the same-gen inference variant TPU v6e (Trillium), the v6p upgrades HBM capacity (32GB → 96GB) and adds Pathways distributed software support. It is the primary chip powering Google's internal Gemini 1.5 Pro/Ultra, Google Search, and advertising recommendation system training.

Key positioning:

  • v6e (Trillium) = Inference + mid-scale training (TPU v6e separate page)
  • v6p (Pathway) = Large-scale training + Pathways software stack
  • v7 (Ironwood) = 2025 H2 inference-specific (TPU Ironwood separate page)

Core Specifications​

ItemSpec
CodenameTrillium Training Edition (Google internal: Pathway)
ArchitectureGoogle TPU v6 (same generation as v6e)
ProcessTSMC 5nm (vs v5e 7nm)
SparseCore4× improved (embedding recommendation processing)
HBM96 GB HBM2 (v6e only 32GB)
HBM Bandwidth1.6 TB/s (v6e only 819 GB/s)
MXU2× 128×128 (same as v6e)
FP8 dense2,700 TFLOPS
BF16 dense1,350 TFLOPS
INT82.7 POPS
Sparsity2:4 structured sparsity (2× acceleration)
TDP~450 W (same as v6e)
Form FactorCloud TPU v6p pod slice
Pod Scale9,216 chips (v6e only 256)
Pod Compute24.9 EF FP8 dense (v6e only 0.4 EF)
Pod Bandwidth14.7 TB/s intra-domain (v6e only 1.6 TB/s)
Production2024-12
PriceNot public (Google Cloud internal)

Comparison with Same-Gen v6e​

MetricTPU v6p (Pathway)TPU v6e (Trillium)Difference
PositioningTraining-specificInference + mid training-
Memory96GB HBM232GB HBM23×
Bandwidth1.6 TB/s819 GB/s2×
FP8 dense2.7 PF1.5 PF1.8×
Sparsity2:4 structured1:2 structured2× acceleration
SparseCore4× improvedBaseline4×
Pod Scale9,216 chips256 chips36×
Pod Compute24.9 EF FP80.4 EF FP862×
Pod Bandwidth14.7 TB/s1.6 TB/s9×
InterconnectICI + DCN 6.4 Tb/sICI 656 GB/s10×
PathwaysFull supportBasicSignificant

TPU Generations Comparison​

GenerationCodenameReleaseMemoryFP8 densePod Scale
TPU v2-201816GB HBMN/A (FP16 180 TF)256
TPU v3-201932GB HBMN/A (FP16 420 TF)1024
TPU v4-202132GB HBM21.1 PF4096
TPU v5e-202316GB HBM20.4 PF256
TPU v5p-2023-Q396GB HBM21.89 PF8,960
TPU v6eTrillium2024-Q232GB HBM21.5 PF256
TPU v6pPathway2024-1296GB HBM22.7 PF9,216
TPU v7Ironwood2025 H2192GB HBM3E4.6 PF9,216

Pathways Software Stack​

LayerToolDescription
AI FrameworksJAXGoogle-recommended (Flax / Optax / RLlib)
PathwaysHeterogeneous accelerator unified programming (v6p full support)
TensorFlowCompatible (v6p optimized)
PyTorch/XLACompatible (v6p experimental)
CompilerXLAAccelerator compiler (v6p optimized edition)
DistributedGSPMDTensor parallelism (v6p 9K chip optimized)
Collective CommunicationDUSProprietary (v6p 14.7 TB/s intra-domain)
Accelerator AbstractionPathways RuntimeCross TPU/GPU/CPU heterogeneous scheduling

Pathways strategy: A single programming model across TPU pods simplifies ultra-large LLM training. Google internally uses Pathways to train Gemini 1.5/2.0.

TPU v6p Use Cases​

  • ✅ Ultra-large LLM training (Gemini 1.5/2.0, PaLM 2, Gemma 2)
  • ✅ Multimodal models (video + text + image)
  • ✅ Recommendation systems (SparseCore 4× acceleration)
  • ✅ Google Cloud TPU customers (Anthropic, Cohere, etc.)
  • ✅ JAX research (DeepMind, Google Research)
  • ❌ China market (export controls)
  • ❌ Native PyTorch (requires XLA translation, 10-20% performance loss)

Pod Topology: 9,216 Chips​

DimensionConfiguration
Pod Size9,216 v6p chips
Pod Topology12 rows × 12 racks × 64 chips
Pod Total Compute24.9 EF FP8 dense
Pod Total Memory885 TB HBM2
Pod InterconnectICI (chip-to-chip) + DCN (rack-to-rack)
Pod Power~4.1 MW (TPU only)
Pod Physical Size~12 racks (including cooling)
Pod Price$50-100M (estimated)

TPU v6p Pod advantage: 9K chips with 14.7 TB/s interconnect is critical for Gemini 1.5/2.0 trillion-parameter model training (a single card's 96GB cannot hold full model weights).

Google Internal Usage​

  • Gemini 1.5 Pro/Ultra training (TPU v6p + v5p hybrid)
  • Google Search ranking models (MUM, BERT improvements)
  • Advertising recommendation system (SparseCore embedding acceleration)
  • YouTube video understanding (multimodal)
  • DeepMind AlphaFold 3 (structure prediction)
  • Waymo autonomous driving (perception models)
  • Google Cloud customers: Anthropic (Claude 3.5), Cohere, AssemblyAI, Mistral

Vendor Information​

ItemDetail
CompanyGoogle LLC
Product Pagehttps://cloud.google.com/tpu
Business UnitGoogle Cloud + Google DeepMind
TPU Chip DesignGoogle Silicon team (Haifa, Israel + Mountain View, USA)
FoundryTSMC 5nm (InFO_SoC packaging)
Google Cloud TPU Pricingv6p ~$4-5/hr (pod slice)
CustomersGoogle internal + Anthropic / Cohere / Mistral, etc.

Key Features​

  • 96GB HBM2: Large single-card memory, 70B+ model training without multi-card
  • 9,216-chip Pod: One of the largest single domains in the industry (vs H100 8K cluster requiring InfiniBand)
  • Pathways distributed: Single programming model across 9K chips
  • SparseCore 4×: Recommendation system / MoE acceleration
  • JAX deeply optimized: JAX + Flax performance comparable to or slightly ahead of PyTorch + CUDA
  • Drawbacks: Google Cloud deployment only, weak PyTorch compatibility

v6p vs v5p Comparison​

MetricTPU v6p (2024-12)TPU v5p (2023-Q3)Improvement
Memory96GB HBM296GB HBM2Same
Bandwidth1.6 TB/s1.4 TB/s+14%
FP8 dense2.7 PF1.89 PF+43%
Sparsity2:4 structured1:2 structured2× acceleration
SparseCore4× improvedBaseline4×
Pod Scale9,2168,9603%
Pod Compute24.9 EF16.9 EF+47%
PathwaysFullBasicSignificant
ProcessTSMC 5nmTSMC 5nmSame