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Iluvatar CoreX TianGai 300 (BI-V300)

Product Overview​

TianGai 300 is the first product built on Iluvatar CoreX's newly developed in-house architecture, and the newest flagship of the company's TianGai general-purpose GPU training line. Iluvatar CoreX (9903.HK) officially unveiled it on July 19, 2026, during the 2026 World Artificial Intelligence Conference (WAIC 2026) — the company's first flagship iteration in the five years since TianGai 100 launched in 2021.

The chip is built on Iluvatar CoreX's in-house SIMT general-purpose compute architecture, integrating more than 100 billion transistors and more than 200 AI compute cores, each with its own high-speed cache and data path. Single-chip FP16 compute exceeds 1,000 TFLOPS and INT8 compute reaches over 2,000 TOPS, built on a 7nm process with typical power kept under 600W. It supports FP4, FP8 and other precisions along with the MMA, DPX, and FMA instruction sets, and ships in both PCIe card and OAM module form factors.

Where earlier parts simply stacked up compute, TianGai 300 differentiates on how efficiently raw compute converts into tokens actually produced. Officially disclosed measured results include: Attention efficiency above 90% across precisions; 10% higher Attention throughput than the Hopper architecture reference at 64k context; over 70% compute efficiency in DeepSeek V4 MoE scenarios and 10% higher average inference efficiency than Hopper; time-to-first-token roughly 20% lower than the Hopper reference across Qwen, GLM, Kimi, and DeepSeek; and average communication latency 13% lower during Decode. The company's overall positioning is to match and exceed Hopper-class international solutions.

Worth noting: Morgan Stanley's supply-chain research at WAIC recorded that TianGai 300's Prefill and Decode performance exceeds the NVIDIA H100 (company's own claim), while management simultaneously acknowledged the part still trails Blackwell by a generation. Iluvatar CoreX has already scheduled the next-generation TianGai 400 to tape out in 2027, explicitly targeting Blackwell.

⚠️ HBM generation discrepancy: two accounts of TianGai 300's memory technology exist. The Baidu Baike entry records HBM3, while Morgan Stanley's supply-chain research records HBM3E. Neither Iluvatar CoreX's official news release nor mainstream outlets (The Paper, Southern+, China Securities Journal) specify the HBM generation, publishing only 144 GB of capacity and roughly 4 TB/s of bandwidth. This card follows the HBM3E figure from Morgan Stanley's independent supply-chain research — on the grounds that a 144 GB / ~4 TB/s combination sits closer to HBM3E's production maturity — while flagging the disagreement. Treat the vendor's final data sheet as authoritative.

Key Specifications​

ParameterValue
ArchitectureSIMT general-purpose compute architecture (Iluvatar CoreX in-house, first of a new generation)
Process7nm
Memory144 GB
Memory TypeHBM3E
Memory Bandwidthapprox. 4 TB/s
FP8Supported
FP4Supported
FP161000 TFLOPS and above
INT82000 TOPS and above
TDPUnder 600 W
InterconnectNot disclosed
Release / ProductionReleased July 19, 2026; ready for scaled deployment

📌 On the spec figures: transistor count above 100 billion, AI compute cores above 200, FP16 above 1,000 TFLOPS, INT8 above 2,000 TOPS, power under 600W, and the 7nm process are all Iluvatar CoreX's official launch figures.

📌 On FP4 / FP8: the company explicitly states TianGai 300 covers "FP4, FP8 and other precisions" but has not published concrete FP4 or FP8 compute numbers, so only "Supported" is recorded here.

📌 HBM generation discrepancy: Baidu Baike says HBM3, Morgan Stanley's supply-chain research says HBM3E, and the company says neither. This table takes HBM3E; the 144 GB capacity and ~4 TB/s bandwidth are common to both accounts.

⚠️ Not disclosed: the specific interconnect protocol and bandwidth, exact TDP, and FP4 / FP8 compute are all unpublished. Officially the company only states that the part "supports high-speed die-to-die interconnect, with multiple TianGai 300 chips forming large-scale compute clusters over a high-speed interconnect bus."

Key Features​

1. A SIMT General-Purpose Architecture: Back to the Essence of Computing​

  • TianGai 300 is the first product on Iluvatar CoreX's new in-house architecture, whose SIMT design efficiently supports scalar, vector, and tensor compute types
  • The company stresses that it is "not confined to the Transformer architecture" — beyond Attention, FFN, and MoE, it also targets matrix solving, dynamic programming, sparse computation, and digital twins
  • Three dedicated instruction extensions:
    • ixSMEX — raises data reuse to cut redundant memory traffic
    • ixDPX — compresses computation that previously took six instructions in dynamic programming into a single instruction
    • ixTrans — lossless matrix transposition that lowers storage conflicts and memory overhead

2. Official Measured Efficiency (vs Hopper Reference)​

Test dimensionTianGai 300 result
Attention efficiencyAbove 90% across precisions, ahead of mainstream Hopper solutions
Attention efficiency at 64k context10% above the Hopper reference
DeepSeek V4 MoE compute efficiencyAbove 70%, with training efficiency and cost-effectiveness ahead of Hopper
Average inference efficiency10% above the Hopper reference
Time-to-first-token (Qwen / GLM / Kimi / DeepSeek)Roughly 20% lower than the Hopper reference
Average communication latency (Decode)13% lower
GLM 5.2 Decode efficiency10% above the Hopper reference
Cosmos3 world model inference efficiency10% above the Hopper reference

3. Three Intelligences as the Design Thread​

Iluvatar CoreX's head of AI and accelerated computing, Shan Tianyi (单天逸), frames AI's evolution in three stages, and these form the product's design rationale:

  • Information intelligence (understanding and generating information): heavy optimization of Attention and MoE, raising the parallelism between matrix and vector compute to cut data-read waits and redundant computation; algorithm and hardware co-optimization targets the expert-scheduling and data-routing losses in MoE
  • Action intelligence (planning and execution): strengthened PD disaggregation, with differentiated optimization of the Prefill and Decode stages; for Decode's high-frequency, multi-card, small-message communication pattern, the design cuts protocol overhead and optimizes link paths and data movement
  • Exploratory intelligence (modeling, prediction, discovery): a return to the essence of computing, with scalar, vector, and tensor support across FP4, FP8 and other precisions plus MMA, DPX, and FMA instructions — serving materials discovery, weather prediction, digital twins, and world models

4. Ecosystem and Deployment​

  • TianGai 300 is ready for scaled deployment, with completed deep adaptation alongside domestic cloud providers, server OEMs, interconnect partners, and supernode systems — supporting anything from a single machine to large clusters
  • Iluvatar CoreX has been building out its software stack since 2018 and has now developed close to a hundred acceleration libraries, plus a toolchain spanning communication, compilation, drivers, quantization, and performance analysis
  • Support for mainstream global model frameworks, models, and key acceleration components reduces customers' repeated work on migration, adaptation, and performance tuning
  • Built on the DeepSpark open-source community, co-building applications and evaluation platforms with partners
  • The next-generation TianGai 400 is planned to tape out in 2027, targeting NVIDIA Blackwell

Use Cases​

  • ✅ Large-model training and inference (Attention and MoE optimization, FP4 / FP8 low-precision support)
  • ✅ PD-disaggregated inference architectures (differentiated Prefill and Decode optimization, ~20% lower time-to-first-token)
  • ✅ Agent applications (smart programming, office assistants, business automation, where responsiveness matters)
  • ✅ Long-context workloads (Attention efficiency ~10% above Hopper at 64k context)
  • ✅ Scientific computing and simulation (matrix solving, dynamic programming, sparse computation, digital twins)
  • ✅ World models and predictive applications (Cosmos3 world model inference ~10% above Hopper)
  • ❌ Workloads chasing Blackwell-class peak compute (the company admits it still trails Blackwell by a generation)

Comparison​

Data Sources​