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AI Inference-Dedicated ASIC

AI inference ASICs are chips purpose-built for inference workloads. Unlike training ASICs, they focus more on latency, throughput, and per-token cost.

Mainstream AI Inference ASIC Comparison

ModelVendorMemoryCompute (INT8)TDPInterconnectAvailability
Groq 3 LPX RackNVIDIA (acquired Groq)128GB SRAM aggregate~640,000 TOPS~80kW (rack)640 TB/s2026 H2 (256 LPU/rack)
TPU 8i (Trillium 2)Google288GB HBM~22,000 TOPS (FP8 dense)N/A3D TorusGoogle Cloud (2026-04)
Google TPU v7 (Ironwood)Google192GB HBM4,614 TFLOPS (FP8)N/A3D Torus, 9,216 PodGoogle Cloud
AWS Trainium 3Amazon144GB HBM5,716 TFLOPS (FP8)~700WNeuronLink-v4AWS Trn3 (2025-12 GA)
AWS Inferentia 2Amazon32GB HBM2e~190 TOPS~150W12-chip interconnectAWS Inf2 instances
AWS Inferentia 1AmazonN/A128 TOPS35WN/AAWS Inf1 instances
Google TPU v5eGoogle16GB HBM197 TOPSN/A2D Torus, 256 PodGoogle Cloud
Groq LPU (v1)Groq228MB SRAM1,000 TOPS (est.)300W (system)GroqSyncGroqCloud API
Trainium 2Amazon96GB HBM1,299 TFLOPS (FP8)~700WNeuronLink, 64 UltraServerAWS Trn2

Selection Guide

By LLM Scale

  • Ultra-large LLM (>300B): TPU 8i (288GB HBM), TPU v7 Ironwood (192GB per chip)
  • Large LLM (70B-300B): TPU v7 / Inferentia 2 (12 chips = 384GB) / Trainium 3
  • Medium LLM (7B-70B): Inferentia 2 / Groq LPU / TPU v5e
  • Small LLM (<7B): Inferentia 1 / Groq LPU

By Latency Requirement

  • Extreme low latency (TTFT < 20ms): Groq 3 LPX Rack (post NVIDIA acquisition, 2026 H2)
  • Very low latency (<50ms first token): Groq LPU (v1)
  • Low latency (<200ms): TPU 8i / TPU v5e / Inferentia 2
  • Batch throughput priority: Trainium 3 / TPU v7

By Deployment Method

  • AWS Cloud: Inferentia 2, Trainium 3 (2025-12 GA)
  • Google Cloud: TPU v5e, TPU v6e, TPU v7, TPU 8t (training) + 8i (inference)
  • GroqCloud API (post NVIDIA acquisition): Groq 3 LPX (2026 H2) + Groq LPU (v1)
  • On-premises / private cloud: Groq GroqRack, AWS Outposts, Intel Jaguar Shores (2027-2028)

Key Differences

Inferentia 2 vs Groq LPU

  • Inferentia 2: Cloud-rentable, 70B model needs multiple chips
  • Groq LPU: Ultra-low latency LLM, but single-chip SRAM only 228MB (70B model needs 30+ chips)

TPU v5e vs TPU v7

  • TPU v5e: Lowest inference cost, 16GB memory
  • TPU v7 Ironwood: 192GB large memory, single chip loads 70B+ models

Detailed Product Pages